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Computer Engineering and Design. 2024, (11) Core

Design and implementation of MF-DMA for heterogeneous acceleratorsChinese Full TextEnglish Full Text (MT)

ZHU Xing-hong;ZHANG Zhen-rong;CHEN Yi-jun;School of Computer, Electronics and Information, Guangxi University;

Abstract: Aiming to enhance the data transmission bandwidth and the flexibility of data exchange methods in heterogeneous acceleration systems, a design scheme called multiple functions direct memory access（MF-DMA） architecture was proposed. Three DMA triggering methods including register configuration, RAM list, and descriptor ring, were introduced to accommodate various application data transmission requirements. The MF-DMA data transmission port supported AXIS and AXI4 protocol interfaces, enabling str... More
Keywords：

FPGA; heterogeneous accelerator systems; DMA; accelerators; AXI; PCIe; descriptor ring;

  • DOI：

    10.16208/j.issn1000-7024.2024.11.038

  • Series：

    (I) Electronic Technology ＆ Information Science

  • Subject：

    Automation Technology

  • Classification Code：

    TP273

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